In wireless communication systems, such as Ultra Wide Band (UWB), Wireless Local Area Network (WLAN), etc., a Radio Frequency (RF) signal undergoes processing and mixing with a local oscillator signal for down-conversion of the RF signal into a baseband signal. In traditional implementations, down-conversion of the RF signal to the baseband signal takes place in the current domain, however signal processing, such as amplification and filtering, takes place in the voltage domain. In addition, interfaces between signal processing blocks and mixing blocks are also in voltage domain in a classical RF receiver. Therefore, conversions of the baseband signal from voltage domain to current domain and vice versa usually take place several times. This can increase noise, chip area and power consumption substantially.
Recently, more and more RF transceivers used in the wireless communication systems have Very Large Scale Integration (VLSI) or even System-on-Chip (SoC) level integration, and they support multi-band and/or multi-standard operation. The signal processing blocks and multiple RF frontend blocks including mixers are integrated in a VLSI Integrated Circuit (IC). In most cases, multiple RF frontend blocks occupy a large area, and the signal processing blocks may need to be appropriately separated from the RF frontend blocks for proper floor planning. As a result, the signal processing block delivers a signal to the RF block via long wirings. The passage of the signal via long wirings can couple noises to the interface nodes, and cause high consumption of power for driving parasitic load of the long wirings.